Non-volatile memory Configuration Contactless CCID Bitrates
September 20, 2024 at 2:48 AMNFC / RFID HF bit-rates in PC/SC mode
Address : 0232
(bank 2, register 32
)
Size : 2 bytes
Type : array (fixed length)
Default : 0000
Remark
-
Forcing the reader to use low-speed protocol increase the operating distance, makes the communication with the card more reliable, and decreases the power consumption.
-
This register is not used in Smart Reader mode (only lowest-speed protocol are used then).
Content
Byte 0 : Bitrates for NFC-A (ISO/IEC 14443 type A)
Bit | Role | Values |
---|---|---|
7 | RFU | |
6 | PICC to PCD at 848kbps | 0 : Disabled1 : Enabled |
5 | PICC to PCD at 242kbps | 0 : Disabled1 : Enabled |
4 | PICC to PCD at 212kbps | 0 : Disabled1 : Enabled |
3 | RFU | |
2 | PCD to PICC at 848kbps | 0 : Disabled1 : Enabled |
1 | PCD to PICC at 242kbps | 0 : Disabled1 : Enabled |
0 | PCD to PICC at 212kbps | 0 : Disabled1 : Enabled |
Byte 1 : Bitrates for NFC-B (ISO/IEC 14443 type B)
Bit | Role | Values |
---|---|---|
7 | RFU | |
6 | PICC to PCD at 848kbps | 0 : Disabled1 : Enabled |
5 | PICC to PCD at 242kbps | 0 : Disabled1 : Enabled |
4 | PICC to PCD at 212kbps | 0 : Disabled1 : Enabled |
3 | RFU | |
2 | PCD to PICC at 848kbps | 0 : Disabled1 : Enabled |
1 | PCD to PICC at 242kbps | 0 : Disabled1 : Enabled |
0 | PCD to PICC at 212kbps | 0 : Disabled1 : Enabled |